Empresa: Michael Page
Provincia: hibrido
Población:
Descripción:
Perfil buscado (Hombre/Mujer)
You will report to the verification manager and will have the opportunity to be a driving force of the verification effort. Your day-to-day work will entail the following:
• Reading and analysing the system requirements and architecture requirement documents
• Plan for functional verification activities for a given subsystem/functionality
• Verification environment development and maintenance in SystemVerilog/UVM/SystemC/C++
• Tests writing in embedded C and debug
• Participation to verification methodology improvements
• Project milestones and deliverables planning with respect to functional verification and with external partners
• Organize work and deliverables between skills, internal and external teams
• Opportunities for mentoring and training the next generation of verification engineers
• Opportunities to manage teams from external partners
• International company in expansion with offices in Barcelona|Career opportunities and development.
We are particularly looking for engineers with at least 4 years of experience in:
• Verification of complex SoC or IP
• Experienced in:
• SystemVerilog/UVM/VHDL
• SystemC/C++
• Some previous experience in Firmware based verification is a good to have
• Some knowledge of scripting languages like Bash/Perl/Python
• Use of verification management tools
• Good level of English, both written and spoken is mandatory.
Experience in the following are a plus:
• Experience in Firmware-based verification
• Knowledge in metrics-driven verification
• Use Git/Gitlab
• Insights of AMBA and other ARM Ips or standard peripherals like PCIe, DDR, HBM …
Soft kills recommended:
• Team player, able to work with multiple cultures both on site and remotely.
• Autonomous and flexible is mandatory.
International European company with presence in different countries is working in designing the microprocessor powering supercomputers in the European union. To accomplish its mission, it needs verification engineers keen to work across a wide range of technologies and on methodologies at the state of the art. You will be involved in verification of products built around the highest performance cores and the latest standard protocols.
• Fixed salary and variable part to be defined on experience.
• Restaurant tickets.
• Private insurance 70% covered.
• At least 2 days of homeoffice per week.
Tecnologías: C, C++, SystemVerilog
Tipo de Contrato:
Indefinido
Salario: Sin especificar
Experiencia: 3-5 años
Funciones: Técnico Hardware
Descubre más: https://www.tecnoempleo.com/senior-hardware-verification-engineer-hibrido/c-c-systemverilog/rf-f4761d30a2eb13c9c946
